1. Field of the Invention
The present invention relates to methods and apparatus for effecting wafer-level burn-in, or stress testing, of semiconductor devices and, more particularly, to apparatus and methods for establishing an electrical connection between semiconductor devices on a wafer or other substrate including multiple semiconductor devices thereon and burn-in test equipment. Specifically, the present invention relates to apparatus and methods that employ a magnetic field to establish an electrical connection between semiconductor devices carried upon a wafer or other substrate and burn-in test equipment.
2. Background of the Related Art
Once semiconductor devices have been fabricated, the semiconductor devices or representative samples thereof are typically subjected to a series of tests. These tests are intended to determine whether the semiconductor devices will meet various performance and reliability standards.
Stress testing, or burn-in testing, is one of the various types of tests that may be performed on a semiconductor devices. Stress testing typically involves the application of a substantial amount of current to one or more semiconductor devices over a prolonged period of time and at an increased temperature or with varied temperature. For example, about 10 milliamps (mA) of current may be applied to each semiconductor device carried upon a substrate as the temperature of the semiconductor device is cycled between ambient temperature and a temperature of at least about 100xc2x0 C. Such cycling of the temperature of the semiconductor device as current is being applied thereto is intended to stress the semiconductor device by driving any contaminants therein into the active circuitry thereof, thus causing failure of the semiconductor device. This type of stress testing is known in the art to cause the early failure of unreliable semiconductor devices, thereby preventing these unreliable semiconductor devices from being sold and used. As a result, semiconductor devices that pass such stress testing are typically more reliable than those which fail such stress tests. from being sold and used. As a result, semiconductor devices that pass such stress testing are typically more reliable than those which fail such stress tests.
Conventionally, stress testing equipment has included a carrier configured to hold one or more semiconductor devices during testing and a burn-in oven within which stress testing is conducted. Various types of carriers have been developed, including carriers for single, bare or packaged semiconductor devices, as well as wafer carriers. The carriers may include electrically conductive structures, such as pins, that contact the bond pads of each semiconductor device held by the carrier so as to apply an electrical current or a voltage to each semiconductor device held by the carrier.
Wafer carriers may alternatively be configured to establish an electrical connection with a multiplicity of semiconductor devices carried upon a wafer or other substrate by contacting one or more common contact locations formed on the wafer or other substrate. For example, it is known in the art to fabricate wafers with each of the semiconductor devices carried thereon in communication with a common ground contact and a common power (VCC) contact, which are also carried upon the wafer. Conventionally, electrical connection of the common ground contact and the common power (VCC) contact of such a wafer to ground and a power (VCC) source, respectively, has been effected by use of clamping mechanisms, such as C-clamps or so-called xe2x80x9calligator clipsxe2x80x9d with planar conductive plates thereon.
When alligator clips are used to establish an electrical connection between the semiconductor devices on a wafer and a ground or a power source, a radial tangent force is applied to the substantially flat active surface and backside of the wafer at the locations of the ground contact and the power (VCC) contact. While a low resistance electrical contact is established by use of such alligator clips, the radial tangent force applied by an alligator clip may cause the conductive plates on the alligator clip to contact only a small area of the respective contact formed on the active surface of the wafer and the opposing backside of the wafer. As a result, a large amount of pressure may be applied to a small area on the wafer, which may cause damage to the wafer that may, in turn, damage semiconductor devices carried by the wafer. In addition, as the temperature of the burn-in oven is increased, the alligator clips may expand and, thus, be moved along the wafer, which may also damage the wafer, as well as the semiconductor devices formed thereon.
While C-clamps contact larger areas of the respective common ground and power (VCC) contacts formed on the active surface of a wafer, as well as larger areas on the backside of the wafer, and apply force to the wafer in a direction substantially normal, or perpendicular, to the plane of the wafer, C-clamps are relatively clumsy and would, therefore, likely increase the chance that a wafer is damaged as C-clamps are secured to their respective contacts. Moreover, when stress testing involves varied temperatures, the expansion of a C-clamp would increase the amount of force applied to the wafer, which could crack or otherwise damage the wafer, as well as semiconductor devices carried upon the wafer. Conversely, contraction of a C-clamp during cooling could result in an inadequate electrical connection between the C-clamp and its corresponding contact.
Due to the material expansion that typically occurs with the temperature variations of burn-in testing, the direction at which contact force is applied to a substrate by both alligator clips and C-clamps may deviate from normal (i.e., from a direction that is perpendicular to the plane of the substrate). As is known in the art, deviations in contact force may cause similar deviations in contact resistance. Even a small change in contact resistance may translate into a substantial drop in the voltage supplied (VCC) to each semiconductor die on the substrate. For example, when the substrate is a wafer that carries 500 semiconductor dice, about 5 amps (A) of current are applied to the power supply (VCC) contact of the substrate, or about 10 mA is supplied to each of the 500 dice. As calculated in accordance with Ohm""s law, a small, 20 milliohms (mxcexa9) increase in the contact resistance between an electrical connector of the burn-in test equipment and a common contact on the substrate would cause a substantial, 100 mV decrease in the voltage (VCC) applied to the dice through the common contact. Thus, the amount of power and voltage applied to each die during wafer-level burn-in testing may not be consistent or repeatable when alligator clips or C-clamps are used to supply a burn-in voltage to dice through a common contact on the wafer or other substrate.
No known apparatus or method for establishing an electrical contact with a common contact on a wafer is available which does not induce stress on or in the wafer. No known apparatus or method in wafer-scale stress testing of semiconductor devices is available without applying too much force or too little force to the wafer.
The present invention includes an electrical connector configured to establish an electrical connection between a ground or a power (VCC) source and a common contact formed on a wafer without applying a potentially damaging amount of force to the wafer. The present invention also includes methods for assembling a wafer or other semiconductor substrate with stress testing equipment, as well as methods for wafer-level stress testing of semiconductor devices.
An electrical connector incorporating teachings of the present invention may include two opposed members, as contact plates, each of which is configured to be positioned against a surface of a wafer or other semiconductor substrate. In use, the two members of an electrical connector of the present invention are positioned on corresponding locations of opposite sides of a wafer or other semiconductor substrate an apply opposing forces to the wafer or other semiconductor substrate in directions normal to a plane of the wafer or other semiconductor substrate. The amounts of opposing force may be substantially equal. Accordingly, at least one of the two opposed members may include an attractive element, such as a magnet, which attracts a corresponding element of the oppositely positioned member. The corresponding element may, therefore, include a magnet of opposite polarity or a material, such as in iron-containing material, that may be attracted to a magnetic field. In addition, the electrical connector member that is to be biased against a common contact formed on the wafer or other semiconductor device includes an electrically conductive element, while the other, opposite member of the electrical connector may include an electrically nonconductive support element configured to engage a backside of the wafer or other semiconductor substrate. The support element may also be configured to cushion the backside of the semiconductor substrate.
A method for establishing an electrical connection in accordance with teachings of the present invention includes positioning a first member of an electrical connector in electrically conductive contact with a contact of a semiconductor device structure, such as a wafer, another substrate carrying a plurality of semiconductor devices, or a single semiconductor device. A second member of the electrical connector is positioned in a corresponding location on an opposite side of the semiconductor device structure. The first and second members of the electrical connector nonrigidly apply opposed force to the semiconductor device structure in directions substantially normal to a plane of the semiconductor device structure. The amounts of opposed force applied to the semiconductor device structure by the first and second members are preferably substantially equal. Preferably, the amounts of force applied by the first and second members of the electrical connector to the semiconductor device structure are also sufficient to establish electrical communication between the first member and the contact without inducing potentially damaging stresses in the semiconductor device structure. The opposed forces may be generated by magnetic attraction of the first and second elements of the electrical connector to one another, by other known, nonrigid attractive forces, or by other nonrigid securing means for forcing two objects directly toward one another.
A method for stress testing semiconductor devices in accordance with teachings of the present invention includes nonrigidly securing a first electrical connector of the present invention to a ground contact in communication with the semiconductor device and nonrigidly securing a second electrical connector of the present invention to a power (VCC) contact in communication with the semiconductor device, with the first and second electrical connectors each being biased against their respective contacts in a direction substantially normal to a plane of the seconductor device. The stress testing method also includes establishing communication between the second electrical connector and a power (VCC) source, or supply. In addition, stress testing in accordance with teachings of the present invention includes exposing the semiconductor device to an increased temperature or varying the temperature of the semiconductor device, such as by cycling the temperature of the semiconductor device, increasing the temperature of the semiconductor device, or decreasing the temperature of the semiconductor device.
Other features and advantages of the present invention will become apparent to those of ordinary skill in the art through a consideration of the ensuing description, the accompanying drawings, and the appended claims.